Field of the Invention
The present invention relates to a solid-state imaging device and an imaging system using the same.
Description of the Related Art
An example of an obstructive factor which makes it difficult to increase the readout rate of a pixel signal in a solid-state imaging device is the load of a vertical output line, which is increased by the parasitic capacitances of a number of pixel select transistors connected to the vertical output line. To solve this problem, a method of driving the vertical output line by hierarchizing it has been proposed. In Japanese Laid-open Patent Publication No. S63-185281, the vertical output line is divided into a main vertical output line (first vertical output line) and a sub vertical output line (second vertical output line), the main and sub vertical output lines are connected via switches, and a pixel signal is output to the main vertical output line via the sub vertical output line and the switch.
Unfortunately, Japanese Laid-open Patent Publication No. S63-185281 describes only an equivalent circuit diagram, and has not disclosed any practical implementation method.